Topics of Interest

Topics of interest include, but are not limited to
  • Profiling and tracing tools for analyzing an application’s memory access patterns
  • Communication modelling approaches (intra-node, inter-node, CPU to accelerator,...)
  • Approaches for data layout and memory access optimization
  • Programming techniques for communication avoidance and communication hiding
  • Roofline modeling
  • Exploiting hardware features to optimize memory access: high-bandwidth memory, prefetching
  • Data access optimization in the context of disaggregated memory
  • Power and energy monitoring measurement, modeling, and optimization approaches

Program Committee

  • Humayun Kabir (Microsoft, USA)
  • Christian Terboven (RWTH Aachen, Germany)
  • Josef Weidendorfer (Leibniz Supercomputing Centre, Germany)
  • Nathan Tallent (Pacific Northwest National Laboratory, USA)
  • Miwako Tsuji (RIKEN, Japan)
  • Kamer Kaya (Sabancı University, Turkey)
  • Didem Unat (Koç University, Turkey)
  • Xing Cai (Simula Research Laboratory, Norway)
  • Johannes Langguth (Simula Research Laboratory, Norway)
  • Aleksandar Ilic (INESC-ID, Portugal)
  • Leonel Sousa (INESC-ID, Portugal)
  • Karl Fuerlinger (LMU Munich, Germany)

Paper Submission

Submissions must be prepared in Springer LNCS format and between ten and twelve pages in length, including text, the references section, appendices, and figures. All submissions will be reviewed by at least three members of the program committee, in a double-blind review process. Papers will get assessed for novelty, relevance, and quality of the presentation. Accepted papers will be published by by Springer in the LNCS series.

Please submit your paper using Easychair and select the International Workshop on Tools for Data Locality, Power and Performance track.

Important Dates

All dates are with respect to the AoE (anywhere on earth) timezone.

  • Paper submission deadline: May 5 May 21 June 3, 2023 (extended deadline)
  • Author notification: June 19, 2023 June 26, 2023
  • Camera ready submission: July 2, 2023
  • Workshop date: August 29, 2023 (afternoon)

Workshop Program

The TDLPP workshop will be held on August 29, 2023 (afternoon).
Time Presentation
14:00 - 14:30 Leveraging HPC Profiling & Tracing Tools to Understand the Performance of Particle-in-Cell Monte Carlo Simulations
Jeremy Williams, David Tskhakaya, Stefan Costea, Ivy Peng, Marta Garcia-Gasulla and Stefano Markidis
14:30 - 15:00 Analyzing One-Sided Communication Using Memory Access Diagrams
Olaf Krzikalla, Arne Rempke and Ralph Mueller-Pfefferkorn
15:00 - 15:30 Enhancing Performance Monitoring in C/C++ Programs with EDPM: A Domain-Specific Language for Performance Monitoring
David Weisskopf Holmqvist and Suejb Memeti
15:30 - 16:00 Coffee Break
16:00 - 16:30 Performance Prediction for Sparse Matrix Vector Multiplication using Structure-dependent Features
Konstantin Pogorelov, James Trotter and Johannes Langguth
16:30 - 17:00 Sparse-aware CARM: Rooflining locality of sparse computations
Afonso Coutinho, Diogo Marques, Leonel Sousa and Aleksandar Ilic
17:00 - 18:00 Tool Demo Session (Zoom Link for Online Participation)
  • SuperTwin: A Digital Twin for HPC Machines
    Fatih Taşyaran (Sabancı University), Osman Yasal (Koç University), José António Carvalho Freire Morgado (INESC-ID)